// about
Final year at Moratuwa —
from satellite to silicon
I am a final-year Electronic & Telecommunication Engineering undergraduate at the
University of Moratuwa. My final year project is a Low-Power Noise-Shaping SAR-ADC
in SKY130 CMOS Process for Energy Constrained Sensing Applications — a converter
architecture aimed at battery-powered IoT and biomedical sensor nodes.
Before returning to campus I was a research intern at StarLabs, National University of
Singapore, where I developed a smart reaction wheel controller for satellite ADCS —
covering FOC algorithm implementation, sensor interfacing, and embedded motor control
firmware on STM32.
Alongside this, I design analog and mixed-signal ICs — with tapeouts on SKY130A and
IHP SG13G2 PDKs using Cadence, xschem, ngspice, and KLayout. I build FPGA digital
logic in Verilog and write register-level firmware across STM32 and ARM Cortex platforms.
I am actively seeking a PhD position, Research Engineer role, or Custom IC Layout Engineer
opportunity in analog IC design, photonic integrated circuits, or high-frequency systems —
where I can push the boundaries of power-efficient silicon at the device and system level.
3.70
GPA / 4.0 · up to Sem 6
3rd
Globally · Int'l Microelectronics Olympiad
7+
Competition awards
SMACD
Paper accepted · 2026 IEEE Conf.