// about
Research intern at NUS —
from satellite to silicon
I am a research intern at StarLabs, National University of Singapore, developing a
smart reaction wheel controller for satellite ADCS. My work covers FOC algorithm
implementation, sensor interfacing, and embedded motor control firmware on STM32.
Alongside this, I design analog and mixed-signal ICs — with tapeouts on SKY130A and
IHP SG13G2 PDKs using Cadence, xschem, ngspice, and KLayout. I build FPGA digital
logic in Verilog and write register-level firmware across STM32 and ARM Cortex platforms.
I am actively seeking a PhD position, Research Engineer role, or Custom IC Layout Engineer
opportunity in analog IC design, photonic integrated circuits, or high-frequency systems —
where I can push the boundaries of power-efficient silicon at the device and system level.
3.77
GPA / 4.0
3rd
Globally · Int'l Microelectronics Olympiad
7+
Competition awards
SMACD
Paper accepted · 2026 IEEE Conf.